Frequency shift modulator with circuitry for simple change-over between high and low channels

ABSTRACT

The frequency shift modulator comprises an operational amplifier connected so as to form an integrating circuit and followed by a bistable circuit having trigger hysteresis for producing a two-level voltage which is applied to one end of a first resistor whose other end is coupled to an input of the operational amplifier. Logic means are provided for applying a voltage equal or complementary to the said two-level voltage, depending upon the level of the data signal, to one end of a second resistor whose other end is joined with the said other end of the first resistor. Further logic means are provided for applying a voltage equal or complementary to the said two-level voltage, depending on whether the desired modulated signal has either the one or the other central frequency, to one end of a third resistor whose other end is joined with the joined ends of the first and second resistors. Finally, a common resistor is connected between the joined ends of the three above-mentioned resistors and the input of the operational amplifier.

BACKGROUND OF THE INVENTION

The invention relates to a modulator for data transmission by frequency shift modulation comprising a first operational amplifier and an associated capacitor connected so as to form an integrating circuit, a bistable circuit having trigger hysteresis connected to the output of the first operational amplifier for producing a two-level voltage, a first resistor having one end connected to the output of the bistable circuit and the other end coupled to an input of the first operational amplifier so as to produce a triangular voltage at the output of the first operational amplifier, first logic means for applying a voltage equal or complementary to said two-level voltage, depending upon the value of the data signal, to one end of a second resistor whose other end is joined with said other end of the first resistor.

A modulator of this type may, for example, be used to implement 200-baud modems standardized by the CCITT. These modems comprise a modulator to transmit data over a "high" channel by using the frequencies F₁ =1750 Hz+100 Hz and F₂ =1750 Hz-100 Hz, and a modulator to transmit data over a "low" channel by using the frequencies F'₁ =1080 Hz+100 Hz and F'₂ =1080 Hz-100 Hz. The frequencies F_(o) =1750 Hz and F'_(o) =1080 Hz are called hereinafter the central frequencies of the high and the low channels.

U.S. Pat. No. 4,039,952 describes a modulator of the type set forth in the preamble by means of which it is possible to obtain a triangular-shaped or sawtooth signal whose frequency is shifted as a function of the data. However, this U.S. patent does not contemplate the case of a standardized 200-baud modem for data transmission over two channels with the same frequency shift around two different central frequencies. The ideal modulator would then be a universal modulator by means of which it is possible to pass from a "high"-channel modulator to a "low"-channel modulator and vice versa by means of a very simple change-over.

SUMMARY OF THE INVENTION

The present invention has for its object to provide such a universal modulator, which does not require complicated adjustments during manufacture and which allows, by means of a simple change-over, the generation of either a signal modulated with a given frequency shift around one central frequency or another signal modulated with the same frequency shift around another central frequency. Another object of the invention is to provide means to obtain a very high stability of the different frequencies supplied by the modulator in face of the supply voltage and the temperature.

According to the invention, the modulator of the type set forth in the preamble is characterized in that for generating a first or a second frequency shift modulated signal having different central frequencies and being modulated with the same frequency shift the modulator comprises second logic means for applying a voltage equal or complementary to said two-level voltage, depending on whether the desired modulated signal is said first or said second frequency shift modulated signal, to one end of a third resistor whose other end is joined with the joined ends of the first and second resistors, and a common resistor connected between the joined ends of the first, second and third resistors and the input of the first operational amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS

An embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings in which:

FIG. 1 shows a circuit diagram of the modulator according to the invention,

FIG. 2 shows a circuit diagram of the basic oscillator used in the modulator according to the invention,

FIG. 3 shows a series of waveforms of the signals in various portions of the oscillator of FIG. 2, diagram 3a representing the voltage at the input of the bistable circuit having trigger hysteresis, diagram 3b representing a two-level voltage at the output of this bistable circuit and diagram 3c representing the sawtooth-shaped voltage at the output of the integrating circuit,

FIG. 4 shows the resistor network connected to the input of the integrating circuit in the modulator of FIG. 1 and the voltages applied to this network.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The modulator shown in FIG. 1 comprises an integrating circuit formed by an operational amplifier 1, a capacitor 2 of capacitance value C connected between the inverting input and the output of the amplifier 1 and, finally, a resistor network connected to the inverting input, which network will be described hereinafter. The operational amplifier 1 is fed by a voltage source U and its non-inverting input is connected to a reference potential (U/2).

The output of the operational amplifier 1 is coupled by way of a resistor 4 of resistance value R₄ to the inverting input of an operational amplifier 3 forming a comparator. This comparator 3 is also fed by the voltage source U and its non-inverting input is connected to the reference potential (U/2).

The output of the comparator 3 is connected to an inverter 5 which is also fed by the voltage source U. Its output is connected to the inverting input of the comparator 3 by way of a resistor 6 of resistance value R₅. At the output of the inverter 5, a two-level voltage V_(i) is obtained which changes from the value O to the value U when the voltage V₁ at the inverting input of the comparator 3 becomes slightly higher than the voltage (U/2) and which changes from the value U to the value O when the voltage V₁ becomes slightly lower than the voltage (U/2).This trigger action is produced with a certain hysteresis owing to the fact that when the output voltage V₁ of the inverter 5 changes from O to U, the voltage V₁ at the inverting input of the comparator 3 increases suddenly from the value (U/2) to a value much higher than (U/2) and when the output voltage V_(i) changes from U to O, the voltage V₁ decreases suddenly from the value (U/2) to a value much lower than (U/2). This mode of operation is similar to that of the circuit known as Schmitt trigger.

The two-level voltage V_(i) is applied to one end of a resistor 7 of resistance value R₁, whose other end 8 is coupled to the inverting input of the operational amplifier 1.

The two-level voltage V_(i) is also applied to one input of an Exclusive-OR circuit 9, whose other input receives the data signal to be transmitted in the form of a binary signal V_(D) appearing at a terminal 10 and having the levels O and U. At the output of the Exclusive-OR circuit 9, a voltage equal to the two-level voltage V_(i) is obtained when the binary data signal has the level O and a voltage V_(i) complementary to this voltage V_(i) when the binary data signal has the level U. The voltage V_(i) or V_(i) obtained at the output of the Exclusive-OR circuit 9 is applied to one end of a resistor 11 of resistance value R₂ whose other end is connected to the end 8 of the resistor 7. According to the prior art described in the U.S. Pat. No. 4,039,952, the junction 8 of resistors 7 and 11 is directly connected to the inverting input of the operational amplifier 1. In this way, the terminal 12 connected to the output of the operational amplifier 1 outputs a voltage V.sub. S of a triangular or sawtooth shape whose frequency may have two values depending upon the level of the binary data signal applied to the terminal 10. The arrangement described so far is therefore suitable for use as a frequency shift modulator. For instance, for the standardized 200-baud modem two different arrangements must be used when employing this prior art technique, each arrangement being adjusted so as to realize either the "high"-channel modulator or the "low"-channel modulator.

In contrast therewith, the present invention renders it possible to implement a universal modulator which, during use, can be assigned to either the "high"-channel or the "low"-channel with the aid of a very simple change-over by means of a detachable wire ("strap") or a change-over circuit. Furthermore, the present invention mitigates the drawbacks of this prior art modulator as regards the frequency stability.

In order to realize a universal modulator according to the present invention, an Exclusive-OR circuit 13 is used, one input of which receives the two-level voltage V_(i) and the other input of which receives by way of a change-over switch 14 the voltage O, when this switch is in the position CH and the voltage U, when this switch is in the position CB. Depending upon the position of the change-over switch 14, there appears at the output of the Exclusive-OR circuit 13 the voltage V_(i) or V_(i) which is applied to one end of a resistor 15 of resistance value R₃, the other end of which is connected to the junction 8 of resistors 7 and 11. Furthermore, as will be described hereinafter, the stability of the frequencies versus the temperature is improved by arranging a resistor 16 of resistance value R_(C) between the junction 8 of the resistors 7, 11 and 15 and the inverting input of the operational amplifier 1.

The following description explains in detail how it is possible to determine the values of the various elements of the arrangement, i.e. capacitance C, resistances R₁ to R₅ and R_(C), to obtain either the "high"-channel signal modulated by the data or the "low"-channel signal modulated by the data, depending upon the position of the change-over switch 14.

The other measures taken to improve the frequency stability are as follows. All the circuits used are implemented in CMOS technology. It is a known fact that the output resistance of the circuits implemented in this CMOS technology is low. Hence, the inevitable fluctuations of the output resistances of the inverter 5 and the Exclusive-OR circuits 9 and 13 due to temperature variations may be neglected with respect to the resistors connected to their output. The inverter 5 and the Exclusive-OR circuits 9 and 13 implemented in CMOS technology behave as near-perfect change-over switches which have substantially no voltage loss and which, as a function of the signals applied to their input, therefore supply substantially either the voltage O or the supply voltage U. Finally, it will be seen that in the arrangement of the universal modulator shown in FIG. 1 the circuits are fed with one sole voltage U; the reference voltage (U/2) applied to the non-inverting inputs of the operational amplifier can be obtained from a voltage divider so that the universal modulator according to the invention requires only one supply source which, in addition to the advantage of simplicity, contributes to the stability of the frequencies with respect to the supply voltage.

For a better understanding of the detailed operation of the modulator shown in FIG. 1, the operation of the basic oscillator used in this modulator will now be further explained. This basic oscillator shown in FIG. 2 comprises some elements corresponding to those in FIG. 1 and having the same reference numerals: operational amplifier 1 provided with capacitor 2 and comparator 3 together with inverter 5 provided with resistors 4 and 6. In this basic oscillator, the two-level voltage V_(i) obtained at the output of the inverter 5 is applied to one end of a single resistor 17 of resistance value R, the other end of which is connected to the inverting input of the operational amplifier 1.

The operation of the basic oscillator is illustrated by the diagrams of FIG. 3. Diagram 3a shows the voltage V₁ at the inverting input of the comparator 3. Diagram 3b shows the two-level voltage V_(i) at the output of the inverter 5 and diagram 3c shows the output voltage V_(S) of the oscillator, taken from the output of the operational amplifier 1. The starting point of this explanation is the instant just prior to the instant t₀ at which the descending voltage V₁ reaches the voltage (U/2) applied to the non-inverting input of the comparator 3. The voltage V_(i) then has the value U. The current in the resistor 6 then has the value (U-U/2)·(1/R₅)=(U/2R₅). As the current in the resistor 4 is the same as the current in the resistor 6, it follows that the output voltage V_(s) has the value V_(Sm) so that: ##EQU1##

At the instant t₀, the comparator 3 changes state, the inverter 5 supplies the voltage V_(i) =O and the voltage V₁ decreases suddenly to a value which is lower than (U/2) depending upon the ratio (R₄ /R₅). As the voltage at the non-inverting input of the operational amplifier 1, whose gain is assumed to be infinite, is equal to (U/2), the current in the resistor 17 has the value (U/2R) and flows in the direction indicated by the solid arrow. Consequently, the output voltage V_(s) increases linearly with a slope (U/2RC).

The voltage V₁ increases also linearly and it can be easily seen that just prior to the instant t₁ at which it attains the reference voltage (U/2) applied to the non-inverting input of the comparator 3, the output voltage V_(S) attains the value V_(SM) so that: ##EQU2##

At the instant t₁, the comparator 3 changes state, the inverter 5 produces the voltage V_(i) =U and the voltage V₁ increases suddenly to a value which is higher than (U/2). The current in the resistor 17 then reverses its direction and flows in the direction indicated by the dotted arrow, whilst still maintaining the amplitude (U/2R). The output voltage V_(S) decreases linearly with a slope -(U/2RC).

At the instant t₂, the circuit operates in the same manner as explained for the instant t₀.

For the sake of simplicity, the frequency F=(1/T) of the output voltage V_(S) of the modulator will hereinafter be expressed as a function of the amplitude i of the current flowing through the resistor R for charging or discharging the capacitor C. When the absolute value of the slope of the output voltage V_(S) is denoted as p, it is possible to write p=(i/C). On the other hand, when the peak-peak amplitude of the output voltage V_(S) is denoted as ΔV_(S) it will be easy to see on the basis of diagram 3c that ##EQU3## where ΔV_(S) =V_(SM) -V_(Sm) =U·(R₄ /R₅).

From this it can be derived that:

    F=i·(1/U)·(1/2C)·(R.sub.4 /R.sub.5). (1)

For the basic arrangement of FIG. 2, i=(U)/(2R) as described above, so that:

    F=(1)/(4RC)·(R.sub.5 /R.sub.4)                    (2)

The above formula (1) can be applied to the modulator shown in FIG. 1, i being the amplitude of the current through the common resistor R_(c) for charging or discharging the capacitor C. This value i must be determined in all circumstances as a function of the level of the data signal V_(D) and as a function of the position of the change-over switch 14.

If it is assumed that the change-over switch 14 is in the position CH in order to obtain the two frequencies F₁ and F₂ of the "high" channel as a function of the data signal V_(D), the current i can be easily obtained from an examination of the circuit diagram of FIG. 4, which shows the resistance network 7, 11, 15, 16 interconnected as shown in FIG. 1. One end of the resistor 16 through which the current i flows has always a voltage which is substantially equal to U/2 when the gain of the operational amplifier 1 is assumed to be infinite. Those ends of the resistors 7, 11, 15 which are not connected to the resistor 16 follow the values of the two-level voltage V_(i) when the voltage V_(D) corresponding to the data signal is such that V_(D) =O, and follow the values of the voltage V_(i), V_(i), V_(i) respectively, when the voltage V_(D) =U. For instance, in the case of V_(i) =O, which corresponds to an increasing output voltage V_(S), the values indicated in FIG. 4 for V_(D) =O and V_(D) =U, respectively, are obtained at the above-mentioned ends of the resistors 7, 11, 15.

Customary calculation shows that the amplitude of the current i which flows through the resistor 16 of resistance value R_(c) takes for V_(D) =O and V_(D) =U, respectively, the values i₁ and i₂ so that: ##EQU4##

When these values are i₁ and i₂ are inserted in the formula (1), the two frequencies F₁ and F₂ for the "high"-channel as produced by the modulator of FIG. 1 are obtained: ##EQU5##

To obtain the two frequencies F'₁ and F'₂ for the "low"-channel as a function of the data signal V_(D), the change-over switch 14 is set to the position CB. In the same manner as above it is possible to show that these two frequencies are given by the formulae: ##EQU6##

It will be seen that the frequencies F₁, F₂, F'₁, F'₂ are independent of the supply voltage U of the modulator.

Between these four frequencies there is still the relation which shows that the frequency excursion is the same for the "high"-channel as for the "low"-channel namely:

    F.sub.1 -F.sub.2 =F'.sub.1 -F'.sub.2                       (5)

To construct a universal modulator which must supply the frequencies (F₁, F₂) and (F'₁, F'₂) satisfying the condition (5), it is, for example, possible to choose the value of the capacitance C, the resistance ratio (R₅ /R₄) and the resistance R_(C), and to determine thereafter the values of the resistances R₁, R₂, R₃ from the relations (3), (4) and (5).

For the modulator standardized by the CCITT for which:

    ______________________________________                                         F.sub.1 = 1850 Hz    F.sub.2 = 1650 Hz                                         F.sub.1 ' = 1180 Hz  F.sub.2 ' = 980 Hz                                        ______________________________________                                    

one may choose, for example:

C=2.7 nF

(R₅ /R₄)=2

R_(c) =93.10 KΩ

and it can then be calculated that:

R₁ =9.150 KΩ

R₂ =129.5 KΩ

R₃ =38.65 KΩ.

In practice, when the various components of the circuit have the values determined by the calculation, with an accuracy of 1%, the only adjustment to be effected in the factory is the adjustment of a central frequency, for example the central frequency Fo of the "high"-channel by acting on one of the resistances of the ratio (R₅ /R₄). This adjustment in the factory having been made, the desired frequencies for the "high"-channel or the "low"-channel will be obtained during use by simply acting on the change-over switch 14 or an equivalent means. When the circuit components have the values determined by the calculation with an accuracy of 1%, the adjustment to be made in the factory consists in the adjustment, in addition to the central frequency F₀ as mentioned above, of the frequency shift F₁ -F₂ by acting on the resistance R₂ and, finally, the spacing F_(o) -F'_(o) between the central frequencies of the "high" and the "low" channels by acting on the resistance R₃. During use a switch-over is made from the frequencies of the "high"-channel to those of the "low"-channel, as indicated above.

It is noted that using the resistor 16 of resistance value R_(c) connected to the input of the operational amplifier 1 in the modulator of FIG. 1, renders it possible to reduce the resistance values R₁, R₂, R₃ of the resistors 7, 11 and 15. When, for example in the modulator standardized by CCITT, the resistor 16 is not used (R_(c) =O) and further C=2.7 nF and (R₅ /R₄)=2, as above, the calculation for the resistors 7, 11 and 15 results in the resistance values R₁ =130.8 KΩ, R₂ =1851.5 KΩ, R₃ =552.7 KΩ. It is known that it is not advantageous, as regards the precision and the stability of the output voltage of an operational amplifier, to connect resistors having this comparatively high values to its input. In contrast therewith, the use of a resistor 16 of resistance value R_(c) renders it possible to connect a resistor network having much lower resistance values, for example the values indicated above, to the input of this amplifier.

Finally, as mentioned hereinbefore, the stability of the frequency versus the temperature will be improved when the inverter 5 and the Exclusive-OR circuits 9 and 13 are implemented in CMOS technology. The variations versus the temperature of the output resistance of these circuits may substantially be neglected with respect to the above-mentioned values of the resistances R₂, R₂, R₃ connected to their outputs. 

What is claimed is:
 1. A modulator for data transmission by frequency shift modulation comprising a first operational amplifier and an associated capacitor connected so as to form an integrating circuit, a bistable circuit having trigger hysteresis connected to the output of the first operational amplifier for producing a two-level voltage, a first resistor having one end connected to the output of the bistable circuit and the other end coupled to an input of the first operational amplifier so as to produce a triangular voltage at the output of the first operational amplifier, first logic means for applying a voltage equal or complementary to said two-level voltage, depending upon the value of the data signal, to one end of a second resistor whose other end is joined with said other end of the first resistor, characterized in that for generating a first or a second frequency shift modulated signal having different central frequencies and being modulated with the same frequency shift the modulator comprises second logic means for applying a voltage equal or complementary to said two-level voltage, depending on whether the desired modulated signal is said first or said second frequency shift modulated signal, to one end of a third resistor whose other end is joined with the joined ends of the first and second resistors, and a common resistor connected between the joined ends of the first, second and third resistors and the input of the first operational amplifier.
 2. A modulator as claimed in claim 1, characterized in that the bistable circuit with trigger hysteresis consists of a second operational amplifier followed by an inverter producing said two-level voltage and two resistors connected in series between the output of the first operational amplifier and the output of the inverter, one input of the second operational amplifier being connected to the junction of said two series connected resistors.
 3. A modulator as claimed in claim 2, characterized in that all circuits used are fed with one sole voltage U and that the voltage applied to the other input of the first and second operational amplifiers is equal to U/2.
 4. A modulator as claimed in any one of the claims 1, 2 and 3, characterized in that all circuits used are implemented in CMOS technology. 